With the advancement of micro-machining technologies, an increasingly larger logical scale of semiconductor integrated circuit can be fabricated on a single semiconductor chip. For this reason, there have been provided semiconductor integrated circuits which have systematic functions fabricated on a single semiconductor chip such as a microprocessor and a single-chip microcomputer (hereinafter also called the “system LSI”), which have conventionally been implemented by a plurality of chips.
When a circuit having a variety of functions such as a central processing unit (CPU), a read only memory (ROM), a random access memory (RAM) is fabricated on a single semiconductor chip, it is efficient to previously determine how respective functions are to be connected to one another, and the functions are separately designed. Then, circuit blocks designed to have such predetermined functions (called the “function module” in this specification) may be registered in a database or the like, such that when a similar semiconductor integrated circuit is developed at a later time, a semiconductor integrated circuit satisfying desired specifications can be provided by selecting and combining modules having desired functions from a plurality of registered modules. For this reason, the utilization of a database as mentioned above is highly effective for reducing a developing period.
In the development of logical integrated circuits such as a data processor, a single-chip microcomputer, and the like, a logic test is conducted in a final stage of the development for verifying that internal logic circuits logically operate as expected (failure detection). For testing a small scale logical integrated circuit, a method can be applied which involves inputting a test pattern and comparing output signals with their expected values. However, for a large scale logical integrated circuit, this method requires an immense number of test patterns, and suffers from a lower failure detection ratio. Therefore, some logical integrated circuits such as a system LSI are provided with a shift-scan based test function.
A shift-scan based test circuit enables a shift register to be built by connecting in series a plurality of flip-flops which comprise a logic circuit. Then, upon testing, test data is scanned into this shift register from an input pin to directly input data into the inside of the logic circuit for forcing it to operate. Then, at a certain point in time, data held in the flip-flops are scanned out to an output pin using the shift register to permit a highly efficient test to be conducted.